Makefile rule without dependency expression

Question

I read the German article on "Make" on Wikipedia and found the following 2 lines:

.c.o:
     $(CC) $(CFLAGS) -c -o $@ $<

Why is the dependency expression not specified and why does the target use the double file extension?

Answer 1

This actually defines the suffix rule ... it determines how to create a file ending in ".o" from the corresponding file ending in ".c", which tells make to conclude that " filename .c", if it exists, is a dependency for " filename .o" for any such filename and that the file filename .o "can be created from its * .c dependency with the rule provided.

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Answer 2

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