How to create a file using Makefile

Question

I want to create a .c file from a Makefile. The contents of this C file are as follows:

char *variable1 = $(VAR1_FROM_MAKEFILE);
char *variable2 = $(VAR2_FROM_MAKEFILE);

Is it possible?

Thanks in advance

Answer 1

Yes, you can use shell redirection to write variables to the source file:

VAR1=foobar
all:
    @echo "char *variable1 = \"$(VAR1)\"" > generated.c

(the @ sign here should not have an echo command displayed by make).

---

EDIT: I don't know what your intentions are here, but it would be easier to pass the Makefile variables to the compiler as a macro:

VAR="toco.conf"
CFLAGS = -DVAR='$(VAR)'
all:
    gcc  $(CFLAGS) prog.c

From prog.c:

#include <stdio.h>

int main(int ac, char **av)
{
    printf("%s\n", VAR);
    exit(0);
}

Answer 2

What about make file options?

For Gnu Make: https://www.gnu.org/software/make/manual/html_node/File-Function.html