What is the difference between the $ () bracket and the $ {} curly syntax bracket in a Makefile?

Question

Are there any differences in calling variables with the syntax ${var} and $(var) ? For example, how will a variable expand or something else?

Answer 1

It makes no difference - they mean exactly the same thing (in GNU Make and in POSIX make).

I think $(round brackets) looks more neat, but it's just a personal preference.

Answer 2

The basics of the section on variable references from the state of the GNU make documentation GNU make no different :

To substitute the value of a variable, write the dollar sign followed by the variable name in parentheses or curly braces: either $(foo) or ${foo} is a valid reference for the variable foo.

Answer 3

In fact, it looks completely different:

 , = , list = a,b,c $(info $(subst $(,),-,$(list))_EOL) $(info $(subst ${,},-,$(list))_EOL) 

exits

 ab-c_EOL md/init-profile.md:4: *** unterminated variable reference. Stop. 

But so far I have found this difference when the variable name in $ {...} contains a comma. At first I thought that $ {...} does not expand the comma as part of the cost, but it turns out that I cannot crack it. I still do not understand this ... If anyone had an explanation, I would be happy to find out!

Answer 4

As has already been correctly pointed out, there is no difference , but be careful not to mix the two types of delimiters, as this can lead to cryptic errors, for example, the unomadh GNU example.

From GNU, make a guide to the syntax of function calls (my attention):

[...] If the arguments themselves contain other function calls or variable references, it is more reasonable to use the same separators for all references; write $(subst a,b,$(x)) , not $(subst a,b,${x}) . This is because it is clearer and because only one type of delimiter is matched to find the end of the link .