How is the hand memory model different from ia64?

I have to deal with a lot of multithreaded programs at work. In particular, I want to know how the ARM memory model differs from IA64. Both models are very weak, but are there any specific differences that I should be aware of? I am familiar with ia64, not with the hand.

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I have the same question, and although I did not find a complete answer, this article may be useful: a discussion of a weakly consistent ARM memory model

The section โ€œFurther workโ€ seems to imply that no one (even in ARM, since they wrote the article) formally answered the question:

... , . ?... ARM Alpha, Intel, JMM?

: : . , , . , 5 16, . ARMv7, IA64, POWER SPARC RMO , , , , .

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