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Duration of Instructions

I looked at different instructions in the assembly, and I'm confused about how the lengths of various operands and opcodes are determined.

Is this something you should know from experience, or is there a way to find out which operand / operator combination takes up the number of bytes?

For instance,

push %ebp ; takes up one byte
mov %esp, %ebp ; takes up two bytes

So the question is:

Having seen the given instruction, how can I determine how many bytes are required for its operation code?

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5 answers

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x86 ( Intel @Mehrdad answer):

[prefixes] opcode ModR/M [extra addressing-mode bytes] [immediate]

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x86 1 , , 8086 . , (, , bsf movsx 386), 2- 0f escape, SO, , 8086 ( emu8086); , - , 8086. , 2- , . : P

. 0f b6 c0 movzx eax,al, 0F B6 mov r32, r/m8, C0 - ModR/M, eax (/r field = 0), ( 2 = 11 ) al (/m field = 0).

Intel (mnemonic dst, src1 [,src2, ...]), , Intel AMD. AFAIK, , AT & T. 32 64- , , 8086. , 8086 16- , 64- ( ).

Intel ref. manual (SDM vol.2) 1, 2, 3 ( A.3), . , . ( . - , https://github.com/HJLebbink/asm-dude/wiki http://felixcloutier.com/x86/, HJ Lebbink , , 8086 add 386 movzx).

, , shl not, /r ModR/M . , - , /r . imul r32, r/m32, imm32 (386) , ModR/M . ( , ModR/M , add r/m32, imm8 , , . , /r , add r/m32, r32, imm8. ADD/SUB lea ecx, [rax + 1] copy-and-add.)

:

, /, . Immediates imm8 imm32, -128..127 . ( 16- imm8, imm16).

ModR/M - , , . ( [esp]). , add eax, ecx 2 , add eax, [ecx]. ( esp/rsp ) SIB (//).

1 4 ( disp8 disp32) SIB ModR/M +.

AVX512 EVEX disp8 disp8 , vaddps zmm31, zmm30, [rsi + 256] 7 (4- EVX + = 0x58 + modrm + disp8), vaddps zmm31, zmm30, [rsi + 16] 11 : disp32 +16, 64. xmm disp8.

. Intel.

, 8086 ( x86) ModR/M . , ModR/M

  • ///CMP////XOR/ ... AL/AX/EAX , . and eax, imm32 (5 ) and al,imm8 (2 ). and eax, imm8; 3- and r/m32, imm8. al 8- , .

  • / 1: 8086 imm8, cl 1, , shl r/m32,1, 1 .

    imm8 : P6, , imm8 . rol r32,1 2 uops, 1 rol r32, imm8 ( imm8 1) Sandybridge, Skylake. rcl r32,1 , imm8. (3 uops vs. 8 Skylake).

, 3 , 8 , - 1 .

  • mov r8, imm8: 2 3 mov r/m8, imm8.
  • mov r32, imm32: 5 6 mov r/m32, imm32. : x86-64 REX.W = 1 , 64- . 10- mov r64, imm64. REX.W = 1 r/m32 - 32- ( , ), mov rax, -1 , 7 5 mov eax,-1. (, , . CPU 1 .
  • push/pop register, 1 2 pop r/m32.
  • push/pop ( FS/GS). r/m16.
  • inc r32/dec r32 ( 16/32- : 0x4X REX x86-64, inc eax 2- inc r/m32).

  • xchg eax, reg: 0x90 nop : xchg eax,eax ( 16- , xchg ax,ax). x86-64 90 nop xchg eax,eax, EAX RAX. .

    xchg reg,reg , 3 mov , , 7 . ( 8, nop ...). 8086 , " ", . cbw, - AL AX () , movsx . 1- mul/imul.

xchg eax, r32 - . GCD 8 32- x86. ( , -).

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  • SSE1/SSE3 ABCps 2- (0F xx)
  • SSE2 / 3- (66 0F xx )
  • SSSE3/SSE4.x 4- (3 )

VEX- VEX, SSE SSE3 , "" (xmm/ymm8-15). XMM YMM . ( xmm ymm, .)

vpxor  ymm8,ymm8,ymm5    ; 2-byte VEX
vpxor  ymm7,ymm7,ymm8    ; 3-byte VEX
vpxor  ymm7,ymm8,ymm7    ; 2-byte VEX

, "" 3- VEX, 2- (3- ). , low8 .

, 4-, vblendvps, 4- imm8. , 3- (2- ), , VEX. blendvps - SSE4.1, VEX 66.0F3A.

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6510 . 1 6510. . Opcode , , . , , 5 .

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bne FooBar

"Foobar" , 128 , . , , . , , , .

, , opcode + .

So, I think, sometimes you can say, and in other cases this is not so obvious.

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