I recently read in memory models, and I was a bit confused about how this works.
To quote http://cis.poly.edu/muller/CS623/weakmemory.htm
if the processor writes a new X, then writes a new Y, all other processors that subsequently read Y, then read X, access new Y and new X, old Y and new X, or old X and old Y: but no processor new Y and old X will gain access. This assumption of strong ordering was at one time reasonable. The current computer however manufacturers recommend that programmers do not rely on memory orderliness. This is due to the fact that the new memory management systems are trying to reorder memory access to optimize the goal. Systems that are allowed are prompted to change the memory order of poorly ordered memory systems (model). To study how reordering can be used to improve performance, consider the following assembler code [2].
Load reg1, A // register1 = contents of memory A
Load reg2, B // register2 = contents of memory B
ADD reg3, reg1, reg2 // register3 = register1 + register2
Store reg3, C // contents of memory C = contents of register3
Assuming location B is currently in the cache and location A is not cached, then loading A will be longer than B. Instead of waiting for A, the CPU can extract B from its cache, hiding the delay of Bs: thus the processor can perform the addition as soon as A is available. By loosening strong (sequential) memory models (that is, you must first load A and then B), more performance is possible ---- but reordering may not be transparent to software. Consider the code fragment below, it is part of the code that can be used to implement the spinor semaphore [2].
: , , Y X. (ram) ? , , , .
, , , , , . ?