Geek Answers Handbook

Extending / evaluating makefile variables

Currently, I am facing a problem with my Makefile caused by the evaluation of the make variable. I have reduced complexity, only the essential elements that cause the problem remain.

  • $ (LIST) evaluates to a list of files when reading a Makefile.
  • During step 1, one of these files is deleted.
  • When using the variable in step 2, it is not evaluated again and, therefore, is no longer valid, which leads to an error during the copy command.
  • It would be nice if the variable were evaluated during its use, here during step 2.

Any ideas how to solve or work around this problem?

Makefile:

LIST=$(wildcard src/*.txt)

all: step1 step2

step1:
    @echo "---------- step1 ----------"
    @echo $(LIST)
    rm src/q1.txt
    ls src

step2:
    @echo "---------- step2 ----------"
    @echo $(LIST)
    cp $(LIST) ./dst

Execution Logging:

$ make
---------- step1 ----------
src/q1.txt src/q2.txt
rm src/q1.txt
ls src
q2.txt
---------- step2 ----------
src/q1.txt src/q2.txt
cp src/q1.txt src/q2.txt ./dst
cp: cannot stat `src/q1.txt': No such file or directory
make: *** [step2] Error 1
+5
source share
1 answer

Do not use the lookup function.

LIST = src/*.txt

all: step1 step2

step1:
    @echo "---------- step1 ----------"
    @echo $(LIST)
    rm src/q1.txt
    ls src

step2:
    @echo "---------- step2 ----------"
    @echo $(LIST)
    cp $(LIST) ./dst
+7
source

More articles:


All Articles