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Can an ARM interrupt occur in the middle of an instruction?

This question will be short and sweet.

I know that an instruction can occur between instructions, but can an interrupt be executed during an instruction? Can a load interrupt be interrupted by several instructions before loading all values ​​into registers?

mov r0, r1
                 < interrupt can happen here
ldm r0, {r1-r4}  < can an interrupt happen **during** a load multiple instruction?
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1 answer

Many load instructions are clearly not atomic. See Section A3.5.3 of the ARM V7C Architecture Reference Guide.

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