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Each core has its own set of registers?

A look from this core i7 ih nehalem microarchitecure enter image description here

Each core seems to have its own register file. Therefore, I have a few short questions, because I thought that there was only one set of registers, independent of the number of cores.

  • Each core has its own set of registers? (rax, rbx, rsp, etc.)
  • Each core has its own MMU and TLB? not only one common to all cores?

I know that questions are highly dependent on microarchitecture, but I think that most modern x64 intel processors follow the same design principle.

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Each core has its own set of registers, MMU, TLB, level 1 caches (data and instructions), level 2 cache (this depends on the processor), etc. Cache coherency is maintained through the core via "QPI", and in the case of high-performance Core 7 and server processors such as Xeon, Cache Coherency is supported on processors on a multiprocessor motherboard, exposing "QPI" to the external contacts of these processors (for processors where multiprocessor cache coherency not supported, "QPI" is not "displayed").

Wiki article: Nehalem

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Yes, each core has its own set of registers. "Core" is equivalent to a separate processor on a socket, but with a "multi-core" electronic connection is simple.

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Source: https://habr.com/ru/post/1214494/

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