Switch between ARM / THUMB state

Question

Why does the ARM controller return to the ARM state from the THUMB state when an exception occurs?

Answer 1

One explanation may be that ARM mode is a “native” mode of the processor, and that it can perform more operations in this mode than in the restricted Thumb mode. The Thumb mode, as I understand it, is optimized for code size, which may mean that there are no specific instructions that may be needed to handle exceptions.

This page mentions that exception handling is always done in ARM mode. It gives no reason, therefore, perhaps it’s just “The Way It Is,” by design. It really talks about ways to exit the exception handling back to the proper (ARM or Thumb) mode, so if you don't write an exception handler yourself, you can ignore this problem. This, of course, assumes that your system is configured with a default exception handler that preserves execution mode.

On the other hand, this page talks about this, about the interrupt vectors of the Cortex-M3 ARM implementation:

The LSB of each exception vector indicates whether the exception is thrown.

Thus, this does not seem universal, perhaps you can make your special exception in Thumb mode.

Answer 2

Perhaps this is because the interrupt vector table is indeed an ARM instruction, and it needs to be in ARM mode to process it. This reduces the work of programmers, since you do not need to write two handlers, one for hand mode and one for thumb mode. How would you even know that there is one entry point for an exception, and you can only have one type of instruction to handle it. You can switch to thumb mode after entering a value other than switching to thumb mode after a reset exception.

Cortex-m3 redefined the interrupt vector table as more traditional (address instead of instruction). If necessary, I would suggest that cortex-m3 is just a processor with a thumb (2), so either they redefine the vector table to store finger points, or redefine the table with addresses, or they have enough kernel to handle loading or transition that you usually see in a vector table entry.

Basically, you will need either two entries for exclusion, one for the handler-based handler and one for the thumb-based handler, or you need the user to write their own handler with an entry point, which is one of the modes.

Even with the entry point to one mode in the handler, you still need to know about the mode the processor was in when the exception occurred, in order to find out which address to return to and how to check the corresponding instruction that caused the exception.

Answer 3

It depends on which processor you have, since there are two sets of thumb instructions. In the initial set of instructions for the thumb (used in armv4t, armv5te) there were no instructions to deal with interrupts; The new thumb2 kit (in the cortex series) contains additional instructions, so you can stay in thumb2 mode to handle the interrupt procedure.

Answer 4

Traditional ARM systems boot into ARM mode and go to reset the exception vector after reset. This means that all exception vectors must be written in the ARM assembly. Naturally, if your exceptions are ARM instructions, the CPU is forced to switch its mode to ARM mode before handling the exceptions; if this does not happen, it will result in an undefined exception that will throw another one, and so on and on in an infinite loop.

ARM source systems had only ARM instructions, later THUMB instructions were added; this could be another explanation.