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How to disable automatic reordering of MIPS-GCC commands?

Following this question: Similar MIPS assembler behavior with jump (and link) instruction I have a working binding to build GNU for my MIPS project with one loop (no delay delay for branching!). I would rather write in C, though. The code generated by the compiler itself starts, but I have to manually edit the assembly source every time, because GCC for some reason likes to automatically reorder branch instructions. I don't want to hack this with a script to figure out when to reorder branches again.

Is there any way around this? For some reason, GCC generates code as follows:

.set noreorder ... jr $ra <-- GCC reordered for me! addi $v0, $v0, 10 <-- ... .set reorder

where I really want to pass assembler something like this:

 .set noreorder addi $v0, $v0, 10 jr $ra
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2 answers

I do not think that this can be turned off, since delay slots are present in all MIPS variants. I think this is much better if you implement delay slots in your emulator. It will also bring it closer to real equipment.
If you do not agree with this, you can probably fix gcc so as not to try to fill the delay slots.

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pass the -mips1 and -fno-delayed-branch flags to gcc.

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