I have a netlist (collection of subcircuits) circuits, usually created by some SPICE simulator. It usually has a hierarchy (a top-level subcircuit calls up or creates instances of different subcircuits and defines some connections between them through contacts). An example netlist looks like this:
subckt AN2D0 A1 A2 VDD VSS Z M_u2 (net5 A2 VDD VDD) pch M_u1 (net5 A1 VDD VDD) pch M_u3 (Z net5 VDD VDD) pch M_u4 (net17 A2 VSS VSS) nch M_u2 (Z net5 VSS VSS) nch ends AN2D0 subckt LS_RX_CONTROLLER VDD VSS burst_start_or_sys burst_start_out pd pd_pwm_det pd_pwm_det_TII std_by std_by_or_sys sys_en sys_out I2 (burst_start_or_sys std_by VDD VSS burst_start_out) AN2D2 I1 (net22 std_by_bar VDD VSS sys_out) AN2D2 I5 (net022 pd VDD VSS pd_pwm_det) OR2D2 I10 (net026 pd VDD VSS std_by_or_sys) NR2D2 I9 (sys_en std_by VDD VSS net026) NR2D0 I6 (std_by VDD VSS std_by_bar) INVD0 I3 (pd_pwm_det_TII net037 VDD VSS net022) OR2D0 I11 (sys_en std_by VDD VSS net037) OR2D0 I0 (burst_start_or_sys sys_en VDD VSS net22) AN2D0 ends LS_RX_CONTROLLER
Now in different hierarchies you can create an instance of one subnet. Each called subcircuit is defined before the calling subcircuit. This kind of graph is called Directed Acyclic GRAPH. I made a link to the HASH table from the list of connections to save space. If the subcircuit calls some instance of the subcircuit, then it points to the output. In the most recent hierarchy, we get a MOSFET D or S or G or B node (since the AN2D0 subcircuit is defined). If any network (the connection between the outputs of the instances) is removed from the hierarchy (nothing but calling a subcircuit, for example net5), to the parent calling subcircuit, it is called pin (for example Z) and will always be indicated in the definition line of the current subcircuit by its name ( subckt AN2D0 A1 A2 VDD VSS Z ). I created a hash of hashes of hashes.
GRAPH --> subckt1--->p1 p2 net1 net2 subckt2--->p1 p2 net1 net2 subckt3--->p1 ---->I1.subckt1.p1--->pointing to value of p1 key of subckt1. I2.subckt1.p2 p2 net1 net2
In this case, GRAPH looks like this:
the name of subcircuit-->AN2D0 name of pin or net-->Z name of instant connected to it-->M_u2.nch.D name of instant connected to it-->M_u3.pch.D name of pin or net-->VDD name of instant connected to it-->M_u1.pch.S name of instant connected to it-->M_u1.pch.B name of instant connected to it-->M_u2.pch.S name of instant connected to it-->M_u3.pch.S name of instant connected to it-->M_u2.pch.B name of instant connected to it-->M_u3.pch.B name of pin or net-->A1 name of instant connected to it-->M_u3.nch.G name of instant connected to it-->M_u1.pch.G name of pin or net-->VSS name of instant connected to it-->M_u2.nch.S name of instant connected to it-->M_u4.nch.B name of instant connected to it-->M_u2.nch.B name of instant connected to it-->M_u3.nch.B name of instant connected to it-->M_u4.nch.S name of pin or net-->net5 name of instant connected to it-->M_u3.nch.D name of instant connected to it-->M_u3.pch.G name of instant connected to it-->M_u1.pch.D name of instant connected to it-->M_u2.pch.D name of instant connected to it-->M_u2.nch.G name of pin or net-->A2 name of instant connected to it-->M_u4.nch.G name of instant connected to it-->M_u2.pch.G name of pin or net-->net17 name of instant connected to it-->M_u3.nch.S name of instant connected to it-->M_u4.nch.D the name of subcircuit-->LS_RX_CONTROLLER name of pin or net-->burst_start_or_sys name of instant connected to it-->I2.AN2D2.A1 M_u3.nch.G M_u1.pch.G name of instant connected to it-->I0.AN2D0.A1 M_u3.nch.G M_u1.pch.G name of pin or net-->burst_start_out name of instant connected to it-->I2.AN2D2.Z M_u2.nch.D M_u3.pch.D name of pin or net-->net037 name of instant connected to it-->I11.OR2D0.Z M_u2.nch.D M_u3.pch.D name of instant connected to it-->I3.OR2D0.A2 M_u3.nch.G M_u1.pch.G name of pin or net-->net026 name of instant connected to it-->I10.NR2D2.A1 M_u4.nch.G M_u2.pch.G name of instant connected to it-->I9.NR2D0.ZN M_u3.nch.D M_u2.pch.D M_u4.nch.D name of pin or net-->std_by name of instant connected to it-->I9.NR2D0.A2 M_u3.nch.G M_u1.pch.G name of instant connected to it-->I6.INVD0.I M_u3.pch.G M_u2.nch.G name of instant connected to it-->I2.AN2D2.A2 M_u4.nch.G M_u2.pch.G name of instant connected to it-->I11.OR2D0.A2 M_u3.nch.G M_u1.pch.G name of pin or net-->sys_en name of instant connected to it-->I11.OR2D0.A1 M_u4.nch.G M_u2.pch.G name of instant connected to it-->I0.AN2D0.A2 M_u4.nch.G M_u2.pch.G name of instant connected to it-->I9.NR2D0.A1 M_u4.nch.G M_u2.pch.G name of pin or net-->VDD name of instant connected to it-->I2.AN2D2.VDD M_u1.pch.S M_u1.pch.B M_u2.pch.S M_u3.pch.S M_u2.pch.B M_u3.pch.B name of instant connected to it-->I10.NR2D2.VDD M_u1.pch.S M_u1.pch.B M_u2.pch.B name of instant connected to it-->I0.AN2D0.VDD M_u1.pch.S M_u1.pch.B M_u2.pch.S M_u3.pch.S M_u2.pch.B M_u3.pch.B name of instant connected to it-->I6.INVD0.VDD M_u3.pch.S M_u3.pch.B name of instant connected to it-->I9.NR2D0.VDD M_u1.pch.S M_u1.pch.B M_u2.pch.B name of instant connected to it-->I1.AN2D2.VDD M_u1.pch.S M_u1.pch.B M_u2.pch.S M_u3.pch.S M_u2.pch.B M_u3.pch.B name of instant connected to it-->I11.OR2D0.VDD M_u1.pch.S M_u1.pch.B M_u3.pch.S M_u2.pch.B M_u3.pch.B name of instant connected to it-->I3.OR2D0.VDD M_u1.pch.S M_u1.pch.B M_u3.pch.S M_u2.pch.B M_u3.pch.B name of instant connected to it-->I5.OR2D2.VDD M_u1.pch.S M_u1.pch.B M_u3.pch.S M_u2.pch.B M_u3.pch.B name of pin or net-->sys_out name of instant connected to it-->I1.AN2D2.Z M_u2.nch.D M_u3.pch.D name of pin or net-->net022 name of instant connected to it-->I3.OR2D0.Z M_u2.nch.D M_u3.pch.D name of instant connected to it-->I5.OR2D2.A1 M_u4.nch.G M_u2.pch.G name of pin or net-->pd_pwm_det_TII name of instant connected to it-->I3.OR2D0.A1 M_u4.nch.G M_u2.pch.G name of pin or net-->std_by_or_sys name of instant connected to it-->I10.NR2D2.ZN M_u3.nch.D M_u2.pch.D M_u4.nch.D name of pin or net-->net22 name of instant connected to it-->I0.AN2D0.Z M_u2.nch.D M_u3.pch.D name of instant connected to it-->I1.AN2D2.A1 M_u3.nch.G M_u1.pch.G name of pin or net-->pd name of instant connected to it-->I10.NR2D2.A2 M_u3.nch.G M_u1.pch.G name of instant connected to it-->I5.OR2D2.A2 M_u3.nch.G M_u1.pch.G name of pin or net-->std_by_bar name of instant connected to it-->I6.INVD0.ZN M_u2.nch.D M_u3.pch.D name of instant connected to it-->I1.AN2D2.A2 M_u4.nch.G M_u2.pch.G name of pin or net-->VSS name of instant connected to it-->I11.OR2D0.VSS M_u3.nch.S M_u2.nch.S M_u4.nch.B M_u2.nch.B M_u3.nch.B M_u4.nch.S name of instant connected to it-->I5.OR2D2.VSS M_u3.nch.S M_u4.nch.B M_u2.nch.S M_u2.nch.B M_u3.nch.B M_u4.nch.S name of instant connected to it-->I3.OR2D0.VSS M_u3.nch.S M_u2.nch.S M_u4.nch.B M_u2.nch.B M_u3.nch.B M_u4.nch.S name of instant connected to it-->I6.INVD0.VSS M_u2.nch.S M_u2.nch.B name of instant connected to it-->I0.AN2D0.VSS M_u2.nch.S M_u4.nch.B M_u2.nch.B M_u3.nch.B M_u4.nch.S name of instant connected to it-->I2.AN2D2.VSS M_u2.nch.S M_u4.nch.B M_u2.nch.B M_u3.nch.B M_u4.nch.S name of instant connected to it-->I1.AN2D2.VSS M_u2.nch.S M_u4.nch.B M_u2.nch.B M_u3.nch.B M_u4.nch.S name of instant connected to it-->I9.NR2D0.VSS M_u3.nch.S M_u4.nch.B M_u3.nch.B M_u4.nch.S name of instant connected to it-->I10.NR2D2.VSS M_u3.nch.S M_u4.nch.B M_u3.nch.B M_u4.nch.S name of pin or net-->pd_pwm_det name of instant connected to it-->I5.OR2D2.Z M_u2.nch.D M_u3.pch.D
After that, the name of the subcircuit and the output of the same that can be created from any hierarchy of levels will be indicated, and we must find the parent, i.e. track the parent until the network is output as output. And then stress back all the leaves (MOSFETS D or G or S or B contact).
Please suggest which algorithm will be best suited for this and whether storing them in the hash table of self-promotion is effective or not.
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