MIPS and bnez branch delay delays using the same register

Question

I have the following MIMS asm code:

80031DB8 bnez $v0, loc_80031F58 80031DBC move $v0, $zero 

As far as I understand, the "branch is not zero" will never jump to loc_80031F58, since v0 = 0, is this correct?

Answer 1

No. During the comparison, $v0 matters until 80031DB8 executed. After comparison, when the delay slot is executed and the transition begins, $v0 written with the value 0 .

As soon as a branch is taken or not taken, $v0 has the value 0. That is, at the beginning of execution either 80031F58 (when the branch is taken) or 80031DC0 (when the branch is not busy), $v0 will be 0 , although if the branch is busy, it should have previously had a nonzero value.