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Is it possible to have conditional code at runtime based on CPU architecture?

I am using .Net 4.5 (preview ... 4 is suitable for the purpose of this question). I do threaded work.

Based on my research, I know that x86 processors have a strong memory model, which means that records will not be reordered. This allows you to safely release locks. This does not apply to Itanium processors that have a weak memory model.

I understand volatility, memory barriers, and the principles of reordering execution.

Ideally, I need to insert memory barriers at key points if , that is, an Itanium CPU, but not x86. Is it possible to do this dynamically since it has runtime compiler directives that are JIT processes?

If not, I understand that I will need to have separate assemblies for two platforms. In this case, what is the most elegant way to do this without having 2 sets of C # files, but just to change the purpose?

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In response to your main question; I do not think it is currently possible that CIL instructions are conditionally compiled for machine instructions on the platform (other than what was baked in the JIT compiler).

Your main tool for creating two (or more) collections from the same set of sources is still the preprocessor directive .

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I have no idea if this will help you or not, but there are several options described in this answer:

In another answer, someone provided a link to the following code sample (from Paint.NET) to determine the architecture of the OS. You can make a minor adjustment to enable the IA64 check:

 private enum Platform { X86, X64, Unknown } internal const ushort PROCESSOR_ARCHITECTURE_INTEL = 0; internal const ushort PROCESSOR_ARCHITECTURE_IA64 = 6; internal const ushort PROCESSOR_ARCHITECTURE_AMD64 = 9; internal const ushort PROCESSOR_ARCHITECTURE_UNKNOWN = 0xFFFF; [StructLayout(LayoutKind.Sequential)] internal struct SYSTEM_INFO { public ushort wProcessorArchitecture; public ushort wReserved; public uint dwPageSize; public IntPtr lpMinimumApplicationAddress; public IntPtr lpMaximumApplicationAddress; public UIntPtr dwActiveProcessorMask; public uint dwNumberOfProcessors; public uint dwProcessorType; public uint dwAllocationGranularity; public ushort wProcessorLevel; public ushort wProcessorRevision; }; [DllImport("kernel32.dll")] internal static extern void GetNativeSystemInfo(ref SYSTEM_INFO lpSystemInfo); private static Platform GetPlatform() { SYSTEM_INFO sysInfo = new SYSTEM_INFO(); GetNativeSystemInfo(ref sysInfo); switch (sysInfo.wProcessorArchitecture) { case PROCESSOR_ARCHITECTURE_AMD64: return Platform.X64; case PROCESSOR_ARCHITECTURE_INTEL: return Platform.X86; default: return Platform.Unknown; } }
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