What happens when you turn off interrupts, and what do you do with interrupts that you don't know how to handle?

When you disable interrupts (with cli instruction in x86), what exactly happens?

  • Does the PIC expect you to enable interrupts and trigger an interrupt when this happens? (If so, how much time does he wait, and what happens if time runs out?)

  • Is interruption - from the point of view of the device - sent to the black hole without an answer?

  • How does the PIC somehow tell the device that the "CPU is busy" or something else?

  • Or is something else happening?

Also, how do you handle an interrupt that you don't know how to handle?
Is there a way to tell the PIC (or device if you don’t know what the device is), “yes, I received your message, but I don’t know what to do with it”?

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8259a PIC expects an INTA signal from the CPU. The CPU sends it when interrupt processing starts by passing the control to the corresponding ISR. Which ISR? The PIC passes a CPU interrupt vector that scans the IVT / IDT for the address, and you know everything else. The PIC will not feed the interrupt vector until it receives an INTA.

The 8259a PIC only has unidirectional communication with I / O devices. They may say that they have an interrupt that requires maintenance.

So, everything is in the air in the PIC if the processor does not respond to interruptions. However, devices can optionally cancel and then re-acknowledge interrupt request signals. I do not know what to do. I also don't know which ones take time to service interrupts.

If you are not interested in interrupts from a specific source, you can simply disguise it and you will not receive it. If you take an interrupt but don’t know how to handle it, you can simply tell the PIC that you processed it. This can lead to the fact that the interrupted device will be in a "frozen" state, waiting for an endless wait for service. It can also cause the device to maintain a high interrupt request signal, which will be a problem if you accept interrupts in the activated level mode - you will constantly receive interrupts.

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Interrupts still fire, but the processor does not listen. When you listen again ( sti ), the signal is still present and takes effect as soon as possible.

The PIC PC has several interrupt levels, and I believe that it can hold one active interrupt for each priority level. It will store each of them until the processor reports that the corresponding processing has been completed. If interrupts are turned off for an extended period of time, it may break, so just don't do it!

The device responsible for the interruption will not receive any response while waiting, which in any case is the answer. If he cannot wait, he may enter some error condition that the processor will see when it finally appears.

You will receive only those interrupts that you explicitly enabled, so there should be no surprises. A device driver that includes an interrupt knows better how to handle it.

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Source: https://habr.com/ru/post/1413371/


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