How to create multiple goals from one makefile

Question

I am trying to parameterize my makefile targets. He currently has

TARGET = main 

at the top. It deduces the SRC list from this, and also does many other things.

I changed my code to C, so I have several different top-level .c files to basically get build options. So what I want to do, basically do

 make target1 

or

 make target2 

And change what TARGET installed in the makefile. I am confused how to do this. I thought I could add something like

 target1: all TARGET=target1 

It didn't seem to work too well, though. Is there a common template for how this is done?

Answer 1

Parameterized variable names and target variables can do what you want, since the value of the target variable is usually "inherited" from the prereqs of this target (assuming you use GNU make):

 target1_SRC=123 456 target2_SRC=abc def target1: TARGET=target1 target2: TARGET=target2 target1: all target2: all all: ; @echo $($(TARGET)_SRC) 

Then you can run make target1 or make target2 , for example:

 $ make target1 123 456 $ make target2 abc def 

Answer 2

I would suggest just specifying your goals as separate goals in the makefile:

 all: target1 target2 OTHER_OBJS = misca.o miscb.o miscc.o target1: target1.o $(OTHER_OBJS) target2: target2.o $(OTHER_OBJS) 

Then make , make target1 , make target2 , etc. everyone will do what you want.

You say your makefile "pulls out the SRC list from [ $(TARGET) ]" for some supposedly high-tech purposes, but it may be interesting to try to explicitly list object files in low-tech mode, but instead higher. Using different targets may create a common template for different results.