The last branch of the record refers to the collection of register pairs (MSR), which stores the source and destination addresses associated with recently executed branches. They are supported on the Intel Core 2, Intel Xeon, and Intel Atom processor families. http://css.csail.mit.edu/6.858/2012/readings/ia32/ia32-3b.pdf the document contains more information if you are interested.
Is an LBR-like feature only available on Intel microprocessors OR does something like that exist on ARM, etc.?
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