Suppose foo.c has a line:
#include "something.h"
You need a line in the makefile:
foo.o: foo.c something.h
The gcc compiler can build this line for you. Command
gcc -MMD -c -o foo.o foo.c
will build foo.o and foo.d , which contains the string. (Try it.)
So just change your makefile to create these * .d files and include them, and everything will be ready:
$(ODIR)/%.o: %.c $(DEPS) $(CC) -MMD -c -o $@ $< $(CFLAGS) -include $(ODIR)/*.d
(Further refinements are possible, such as indicating where * .d files should be).
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