It is also possible to use the MMU directly (registers ATS1Cxx and PAR) to perform the V => P translation. See Section B4.2.4 ARM ARM for details.
If you use MMU registers in this way, you may need to protect against racing by other use of registers.
This can be accessed from any kernel driver with the following code,
unsigned int pa;
asm("\t mcr p15, 0, %0, c7, c8, 2\n"
"\t isb\n"
"\t mrc p15, 0, %0, c7, c4, 0\n" : "=r" (pa) : "0" (0xffff0000));
printk("Vector is %x\n", pa & 0xfffff000);
The constants are correct.
- 0xffff0000 is a high vector virtual address.
- 0xfffff000 - 4k .
ARM, Cortex.