Quote from ARM documentation MRC,
MRC
MRC{2}<c><q> <coproc>, #<opc1>, <Rt>, <CRn>, <CRm>{, #<opc2>} Where:2If specified, selects T2 / A2 encoding. If omitted, selects the encoding T1 / A1.<c><q>See Standard Assembly Syntax Fields on page A8-7. ARM MRC2 instruction must be unconditional.<coproc>The name of the coprocessor. The standard names for common coprocessors are p0, p1, ..., p15.<opc1> Indicates the code of operation with the coprocessor in the range from 0 to 7.<Rt>Is the register of the primary destination ARM address. This register can be R0-R14 or APSR_nzcv. The last form writes bits [31:28] of the transferred value to the status flags N, Z, C and V and is set by setting the encoding field Rt to 0b1111. In the pre-UAL assembler syntax, instead of APSR_nzcv, a PC was written instead of a PC.<CRn> , .<CRm> .<opc2> , , 0 7. , <opc2> 0.
MRC{2}<c><q> <coproc>, #<opc1>, <Rt>, <CRn>, <CRm>{, #<opc2>}
Where:
2If specified, selects T2 / A2 encoding. If omitted, selects the encoding T1 / A1.
2
<c><q>See Standard Assembly Syntax Fields on page A8-7. ARM MRC2 instruction must be unconditional.
<c><q>
<coproc>The name of the coprocessor. The standard names for common coprocessors are p0, p1, ..., p15.
<coproc>
<opc1> Indicates the code of operation with the coprocessor in the range from 0 to 7.
<opc1>
<Rt>Is the register of the primary destination ARM address. This register can be R0-R14 or APSR_nzcv. The last form writes bits [31:28] of the transferred value to the status flags N, Z, C and V and is set by setting the encoding field Rt to 0b1111. In the pre-UAL assembler syntax, instead of APSR_nzcv, a PC was written instead of a PC.
<Rt>
<CRn> , .
<CRn>
<CRm> .
<CRm>
<opc2> , , 0 7. , <opc2> 0.
<opc2>
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CRm
opcode
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