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GameBoy compiler with system registers and interrupts

I studied GameBoy programming a lot since I was already familiar with the Z80 Assembly. I was not afraid to use it. I would (of course) find it much more productive to program in C or C ++, but I can’t find a complete compiler for GameBoy, the compilers I can find themselves manage everything and do not provide access to the system registers to the programmer, and also have some terrible disadvantages, such as 100% processor utilization and lack of interrupt support.
Is it possible to access the system registers in the same way as the Arduino AVR compiler? the ability to address a processor or system register simply with its name, for exampleDDRD = %10101011
What do I need to do to add interrupts and system registers to the compiler? All but one system register is only one byte memory address, and interrupt vectors are, of course, memory locations, the only system register that is not a memory address can only be changed with two build commands EIand DI, but it can be correct are there built-in functions?

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A common tactic is to create your own pointers to system registers. I don't know the DDRD address, but something like this should be a trick:

volatile unsigned char *reg_DDRD = (unsigned char *)0xE000;
*reg_DDRD = 0xAB;

C , -. , :

#define DDRD (*reg_DDRD)
DDRD = 0xAB;

, C .

3 . , C. , C, . , , , , :

     org 38h   ; or wherever the gameboy CPU jumps to on interrupt
 jp _intr_function

, CPU intr_function() C. . org, .

, C . , :

void intr_function()
{
     asm(" push af");
     asm(" push bc");
     asm(" push de");
     asm(" push hl");

     // ... now do what you like here.

     asm(" pop hl");
     asm(" pop de");
     asm(" pop bc");
     asm(" pop af");
 }

, . C, .

, . C . main(), , . , C- , SDK Arduino, , , , C.

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-, GBDK, C Gameboy. gb/hardware.h ( doc, ). gb/gb.h: add_VBL, add_LCD, add_TIM, add_SIO add_JOY. ( remove_).

/ , gb/hardware.h:

#define __REG   volatile UINT8 *

#define P1_REG      (*(__REG)0xFF00)    /* Joystick: 1.1.P15.P14.P13.P12.P11.P10 */
#define SB_REG      (*(__REG)0xFF01)    /* Serial IO data buffer */
#define SC_REG      (*(__REG)0xFF02)    /* Serial IO control register */
#define DIV_REG     (*(__REG)0xFF04)    /* Divider register */
#define TIMA_REG    (*(__REG)0xFF05)    /* Timer counter */
#define TMA_REG     (*(__REG)0xFF06)    /* Timer modulo */
#define TAC_REG     (*(__REG)0xFF07)    /* Timer control */
#define IF_REG      (*(__REG)0xFF0F)    /* Interrupt flags: 0.0.0.JOY.SIO.TIM.LCD.VBL */
#define NR10_REG    (*(__REG)0xFF10)    /* Sound register */
#define NR11_REG    (*(__REG)0xFF11)    /* Sound register */
#define NR12_REG    (*(__REG)0xFF12)    /* Sound register */
#define NR13_REG    (*(__REG)0xFF13)    /* Sound register */
#define NR14_REG    (*(__REG)0xFF14)    /* Sound register */
#define NR21_REG    (*(__REG)0xFF16)    /* Sound register */
#define NR22_REG    (*(__REG)0xFF17)    /* Sound register */
#define NR23_REG    (*(__REG)0xFF18)    /* Sound register */
#define NR24_REG    (*(__REG)0xFF19)    /* Sound register */
#define NR30_REG    (*(__REG)0xFF1A)    /* Sound register */
#define NR31_REG    (*(__REG)0xFF1B)    /* Sound register */
#define NR32_REG    (*(__REG)0xFF1C)    /* Sound register */
#define NR33_REG    (*(__REG)0xFF1D)    /* Sound register */
#define NR34_REG    (*(__REG)0xFF1E)    /* Sound register */
#define NR41_REG    (*(__REG)0xFF20)    /* Sound register */
#define NR42_REG    (*(__REG)0xFF21)    /* Sound register */
#define NR43_REG    (*(__REG)0xFF22)    /* Sound register */
#define NR44_REG    (*(__REG)0xFF23)    /* Sound register */
#define NR50_REG    (*(__REG)0xFF24)    /* Sound register */
#define NR51_REG    (*(__REG)0xFF25)    /* Sound register */
#define NR52_REG    (*(__REG)0xFF26)    /* Sound register */
#define LCDC_REG    (*(__REG)0xFF40)    /* LCD control */
#define STAT_REG    (*(__REG)0xFF41)    /* LCD status */
#define SCY_REG     (*(__REG)0xFF42)    /* Scroll Y */
#define SCX_REG     (*(__REG)0xFF43)    /* Scroll X */
#define LY_REG      (*(__REG)0xFF44)    /* LCDC Y-coordinate */
#define LYC_REG     (*(__REG)0xFF45)    /* LY compare */
#define DMA_REG     (*(__REG)0xFF46)    /* DMA transfer */
#define BGP_REG     (*(__REG)0xFF47)    /* BG palette data */
#define OBP0_REG    (*(__REG)0xFF48)    /* OBJ palette 0 data */
#define OBP1_REG    (*(__REG)0xFF49)    /* OBJ palette 1 data */
#define WY_REG      (*(__REG)0xFF4A)    /* Window Y coordinate */
#define WX_REG      (*(__REG)0xFF4B)    /* Window X coordinate */
#define KEY1_REG    (*(__REG)0xFF4D)    /* CPU speed */
#define VBK_REG     (*(__REG)0xFF4F)    /* VRAM bank */
#define HDMA1_REG   (*(__REG)0xFF51)    /* DMA control 1 */
#define HDMA2_REG   (*(__REG)0xFF52)    /* DMA control 2 */
#define HDMA3_REG   (*(__REG)0xFF53)    /* DMA control 3 */
#define HDMA4_REG   (*(__REG)0xFF54)    /* DMA control 4 */
#define HDMA5_REG   (*(__REG)0xFF55)    /* DMA control 5 */
#define RP_REG      (*(__REG)0xFF56)    /* IR port */
#define BCPS_REG    (*(__REG)0xFF68)    /* BG color palette specification */
#define BCPD_REG    (*(__REG)0xFF69)    /* BG color palette data */
#define OCPS_REG    (*(__REG)0xFF6A)    /* OBJ color palette specification */
#define OCPD_REG    (*(__REG)0xFF6B)    /* OBJ color palette data */
#define SVBK_REG    (*(__REG)0xFF70)    /* WRAM bank */
#define IE_REG      (*(__REG)0xFFFF)    /* Interrupt enable */

, , .

, GBDK , libc\gb\crt0.s, , .

, .

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