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How can I achieve DMA from the PCIe Verilog core?

I have a PCIe-generated kernel / endpoint using the xilinx kernel generator for spartan6 fpga on the development board, which I changed a bit to enable MSI and send them every couple of seconds.

In addition, I made a simple C kernel module on the Linux desktop, on which I plugged in a development board. It registers the device, allocates memory, allows bus mastery for the device, and handles interrupts, etc.

What I want to do now is transfer the DMA from the board to the PC, and then an interrupt will be sent upon completion so that the processor can go and read it. I am not a Verilog expert, and the code I have seems to be incapable of any DMA features.

I could not find relevant information on the Internet, so this is my last hope.

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Original comment text:
Have you implemented a transaction level over the generated PCIe core? Why don't you use the free PCIe core if your HDL skills aren't so high? PCIe is a very big thing ....

Yes, the Xilinx IPCore Generator adds a very simple PIO interface at the top layer of the data link layer to handle simple PIO transactions. Note: PIO transaction is outdated and not allowed for new devices.

Currently, I know two pretty good IPCores:

  • XILLYBUS

    • free educational license
    • create IPCore for your FPGA device online and download netlist
    • linux windows ( linux )
    • 8- 32- FIFO
    • linux FPGA /dev/xillybus_read /dev/xillybus_write

  • RIFFA

    • , ​​
    • 12 FIFO
    • HDL

, Xilinx Core ​​PCIe /. ,...

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