Add Library in Vivado 2014.4

Question

I am completely new to Vivado and VHDL, and I would like to receive some recommendations on a fundamental problem.

I suppose that I can create my own libraries and use them in my projects, as well as for standard and fundamental

eg:

library IEEE;
use IEEE.std_logic_1164.ALL;
use IEEE.std_logic_unsigned.ALL;

Now, browsing the net, I did not find anything concrete as an answer; there is no direct way to “add a library” (at least in my version of Vivado).

Is there a way to build VHDL code, let's say type definitions and use them in any file you like, how is it done in C, for example?

Answer 1

, - . , Xilinx ( ) . , .

. , :

tools.vhd

package tools is
    type tribool is (true, false, maybe);
end package;

:

use work.tools.all;
...
signal x : tribool := maybe;

Answer 2

VHDL ( Vivado xil_defaultlib).

/ , Vivado, , " ". , , .

, VHDL. - , , . , , my_library.my_pkg work.my_pkg.

Answer 3

Vivado (, ), , , Questa/Modelsim:

vsim .do:

vlib/to/MyLib
vmap MyLib/to/MyLib
vcom -93 -work MyLib ////MyLibSource.vhd

Vivado now has a tendency to overwrite files in the modeling folder, so do not put them there unless you want to recompile them every time. However, Vivado must respect what is in modelsim.ini. Therefore add the following:

MyLib = path / from / vivado / sim / to / Mylib

Now you can use MyLib like any other library:

library MyLib; 
use MyLib.all; 
. . .  
i_MyAwesomeModel : entity MyLib.HalfAdder_Sim