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What does this CRC implementation mean, with initial meaning?

I am trying to implement a CRC algorithm in Verilog for the SENT sensor protocol.

In a document issued by SAE, they say that their CRC uses the generator polynomial x ^ 4 + x ^ 3 + x ^ 2 + 1 and the initial value is 0101. I understand the basic concept of calculating CRC using XOR division and remainder, but each time, when I try to calculate CRC, I get the wrong answer.

I know this because in the same document they have a list of examples with data bits and corresponding checksum.

For example, a series of hexadecimal values ​​x "73E73E" has a checksum of 15, and a series x "748748" has a checksum of 3. Is there anyone who can come to these values ​​using the information above? If so, how did you do this?

These are a few sentences copied from the document: "The CRC checksum can be implemented as a series of left-shift by 4 (multiply by 16), followed by a 256-element array search. The checksum is determined using all the data nibbles sequentially, and then checks the result using an extra value of zero.

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RevEng, CRC ( , ).

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. CRC- CRC-, , . "" CRC, , .

, , 0x73E73E = > 12, 0x748748 = > 3.

Koopman " all-zero check sequence".

, Wikipedia Python:

def nCRCcalc( poly, data, crc, n):
    crctemp = ( data << n ) | crc

    # data width assumed to be 32 bits
    shift = 32

    while shift > n:
        shift = shift - 1
        mask = 1 << shift
        if mask & crctemp:
            crctemp = crctemp ^ ( poly << (shift - n) )

    return crctemp

- , - , crc - , n - . , 29, crc 5 n 4.

, , . , , , .

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Seed is just the initial value of your crc calculation. Normally, a nonzero seed is required to exclude that the result of crc is zero for all zero data.

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