Using the watch and turning it on

I was provided with code for D-Flip-Flop with support.

process(clk, en)
    begin
        if rising_edge(clk) then
             if en = โ€˜1โ€™ then
                 Q <= D;
        end if;
     end if;
end process;
  • I was told that I should not use if rising_edge(clk) and en = โ€˜1โ€™ then .... Why?
  • Why is there no if for en = '1'before if, if for hours, since the clock changes more often?
  • And is it necessary to indicate what is enin the process brackets process(clk, en)?
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2 answers
  • Some people believe that VHDL compilers and synthesizers cannot understand that this is the same as what you showed here. I never compared the result directly, but I would be sad if that mattered.

  • . . , , , .

  • .

+3

:

, . reset, :

process(clock)  -- nothing else should go in the sensitivity list
begin
    -- never put anything here
    if rising_edge(clock) then  -- or falling_edge(clock)
        -- put the synchronous stuff here
        -- ie the stuff that happens on the rising or falling edge of the clock
    end if;
     -- never put anything here
end process;        

en senstivity, if, .

, , en : reset ; D.

+2

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