What is the >>> symbol in verilog?

Question

Can I find out what the → → symbol is in verilog. When should I use it? Thank!

eg

always @(posedge Clock) begin
  if (Clear) begin
    a < = c>>>8;
    b < = d>>>16;
  end
end

Answer 1

This is the arithmetic right shift operator (see pages 19-20 of the link). This is the opposite case from Java (Java >>is an arithmetic shift to the right, and >>>a logical shift to the right).

Arithmetic right shift - handle case when the number with right-side shift is positive / negative with this behavior:

Move the specified number of bits to the right, fill with the value of the sign bit, if the expression is signed, otherwise it is filled with zero

, signed , :

1000 1100 
--------- >>> 2
1110 0011 //note the left most bits are 1

unsigned:

1000 1100 
--------- >>> 2
0010 0011

0.