How to write an integer in stdout as hex in VHDL?

Question

I can print integeras a decimal value for stdout with:

library std;
use std.textio.all;

entity min is
end min;

architecture behav of min is
begin
    process is
        variable my_line : line;
    begin
        write(my_line, 16);
        writeline(output, my_line);
        wait;
    end process;
end behav;

which outputs:

16

But how to output instead:

10
0x10

Answer 1

Assuming an integer iand VHDL-2008, you can use:

write(output, integer'image(i) & LF);  -- Plain integer value
write(output, "0x" & to_hstring(to_signed(i, 32)) & LF);  -- Hexadecimal representation

For this you need use std.textio.all;. Change the value 32to reduce the length of the hexadecimal value. I chose 32 so that it can represent any integer value in most simulators.

They will also work for operators report, for example.

report "i = 0x" & to_hstring(to_signed(i, 32));

Answer 2

There is no standard library implementation, but, PoC-Libary < href= "https://github.com/VLSI-EDA/PoC/blob/master/src/common/strings.vhdl#L88-L98" rel= "nofollow" > PoC.Strings. , to_string(...), , h .

?

• INTEGER
• 4- .
• / 0..F
• preend 0x

, :

-- format a natural as HEX string
function raw_format_nat_hex(Value : NATURAL) return STRING is
begin
  return raw_format_slv_hex(std_logic_vector(to_unsigned(Value, log2ceil(Value+1))));
end function;

-- format a std_logic_vector as HEX string
function raw_format_slv_hex(slv : STD_LOGIC_VECTOR) return STRING is
  variable Value                : STD_LOGIC_VECTOR(4*div_ceil(slv'length, 4) - 1 downto 0);
  variable Digit                : STD_LOGIC_VECTOR(3 downto 0);
  variable Result               : STRING(1 to div_ceil(slv'length, 4));
  variable j                    : NATURAL;
begin
  Value := resize(slv, Value'length);
  j             := 0;
  for i in Result'reverse_range loop
    Digit       := Value((j * 4) + 3 downto (j * 4));
    Result(i)   := to_HexChar(unsigned(Digit));
    j           := j + 1;
  end loop;
  return Result;
end function;

-- convert an unsigned value(4 bit) to a HEX digit (0-F)
function to_HexChar(Value : UNSIGNED) return CHARACTER is
  constant HEX : STRING := "0123456789ABCDEF";
begin
  if (Value < 16) then
    return HEX(to_integer(Value)+1);
  else
    return 'X';
  end if;
end function;

-- return TRUE, if input is a power of 2
function div_ceil(a : NATURAL; b : POSITIVE) return NATURAL is  -- calculates: ceil(a / b)
begin
  return (a + (b - 1)) / b;
end function;

-- return log2; always rounded up
function log2ceil(arg : positive) return natural is
  variable tmp : positive;
  variable log : natural;
begin
  if arg = 1 then   return 0; end if;
  tmp := 1;
  log := 0;
  while arg > tmp loop
    tmp := tmp * 2;
    log := log + 1;
  end loop;
  return log;
end function;

. 0x.

Answer 3

hwrite IEEE.std_logic_textio:

library IEEE;                                                   -- ADDED
use IEEE.std_logic_1164.all;                                    -- ADDED
use IEEE.numeric_std.all;                                       -- ADDED
use IEEE.std_logic_textio.all;                                  -- ADDED

library std;
use std.textio.all;

entity min is
end min;

architecture behav of min is
begin
    process is
        variable my_line : line;
    begin
        hwrite(my_line, std_logic_vector(to_unsigned(16,8)));   -- CHANGED
        writeline(output, my_line);
        wait;
    end process;
end behav;

The procedure hwritewrites the file std_logic_vectorto the file. So, you need to convert integerto std_logic_vector, however (you also need to specify the number of bits in the function to_unsigned).

http://www.edaplayground.com/x/exs