Well, that's why essentially you are asked to design an 8-in-3 encoder and a decoder from 3 to 8. Because you are given the FA to work with it for other purposes.
First we need to determine how the encoder and decoder work. So, we will build a truth table:
encoder:
Input | Output 01234567 | 421 ----------------- 10000000 | 000 01000000 | 001 00100000 | 010 00010000 | 011 00001000 | 100 00000100 | 101 00000010 | 110 00000001 | 111
and the decoder is just the opposite.
Next, how do we build our encoder? Well, we can just attack it one bit at a time.
So, for the 1st digit we have, if bit 1, 3, 5 or 7 is entered, then it is 1, otherwise it is 0. Therefore, we just need a giant OR with 4 inputs connected to 1, 3, 5 and 7.
For the 2s digit, we need an OR gate connected to 2, 3, 6, 7. Finally, for the 4th shutter, connect them to 4, 5, 6, 7. This does not do any error checking to make sure the extra bits are not set . Although, the behavior in this case looks undefined by specification, so it’s probably OK.
Then you take three lines and feed them to your adders. It’s easy, so I won’t go into it.
Finally, you need a decoder, it's a little more complicated than an encoder.
Look at the decoder truth table:
Input | Output 421 | 01234567 ---------------- 000 | 10000000 001 | 01000000 010 | 00100000 011 | 00010000 100 | 00001000 101 | 00000100 110 | 00000010 111 | 00000001
This time we can’t just use 3 or the gate and call it day.
Write this in a C-like code:
if (!input[0] && !input[1] && !input[2]) output[0] = 1 if (input[0] && !input[1] && !input[2]) output[1] = 1 if (!input[0] && input[1] && !input[2]) output[2] = 1 if (input[0] && input[1] && !input[2]) output[3] = 1 if (!input[0] && !input[1] && input[2]) output[4] = 1 if (input[0] && !input[1] && input[2]) output[5] = 1 if (!input[0] && input[1] && input[2]) output[6] = 1 if (input[0] && input[1] && input[2]) output[7] = 1
So, it looks like we will be using 8 3 input I-gates and three NOT-gates!
This is a bit more complicated, so I made an example implementation:
