Subdirectories and Make Files

Question

I think this is a question that has been asked many times, but I cannot find the right way to do this.

I have the following structure:

project/ project/Makefile project/code project/code/*.cc project/code/Makefile 

When I am in the 'project / code' directory and call make project_code, my code compiles correctly.

I would like to do this when I am in project /, simply calling "make project_code", as if I were in "project / code".

The makefile / Makefile 'file will contain other rules (for example,' install ') and some rules for compilation, as if I were in a project / code. And for this I ask your help ... Thank you.

Answer 1

The easiest way:

 CODE_DIR = code .PHONY: project_code project_code: $(MAKE) -C $(CODE_DIR) 

The .PHONY rule means that project_code not a file to be created, but the -C flag indicates a directory change (which is equivalent to running cd code before calling make ). You can use the same approach to call other targets in the code Makefile.

For example:

 clean: $(MAKE) -C $(CODE_DIR) clean 

Answer 2

Try putting this rule in project / Makefile something like this (for GNU make):

 .PHONY: project_code
 project_code:
        cd code && make