How do processors implement instructions such as MUL / MULT?

Question

In different assembler languages, MUL (x86) / MULT (mips) refers to multiplication. This is a black box for the programmer. I am interested in how the CPU actually performs reproduction regardless of architecture. Suppose I have two 16-bit values ​​in my registers and I am a processor, so I need to implement MUL using other instructions for the bit scripts that I have (and, or, xor, not, shl, shr and etc.). What should I do?

Answer 1

http://en.wikipedia.org/wiki/Multiplication_ALU Wikipedia lists various methods for multiplying in a digital circuit.

When I was working on a project to add SIMD instructions to the DEC Alpha-like processor at Verilog in college, we implemented the Wallace tree multiplier , the main reason was that it ran in a fixed number of cycles and was easily pipelined.

EDIT: You mentioned, using other instructions for bitping, on modern processors, multiplication will not be so microcoded; this will be a way to slow down and the processor will be killed in tests.

Answer 2

This page shows the logic gate for the 4 * 4 Raman Multiplier. You can work from there.

Here is some kind of laboratory where the construction of a 16-bit multiplier from 4-bit multipliers is described, each of which is built using AND gates and full adders. Complete design, chip layout, and simulation waveforms.