How x64 architecture differs from x86

Question

I need to mess with stacks in this architecture and here really is n00b. Any pointers to reading topics / searches that I can do. I am looking for how these architectures are fundamentally different from each other. something more than a Wikipedia article on this topic http://en.wikipedia.org/wiki/X64

Answer 1

X86 has 8 32-bit registers, x64 registers have 64 bits, and there are 8 more. 128-bit SSE registers have 128 bits in both, but on x86 there are 8, and in x64 there are 16. Also, some instructions were cut on x64.

In x64 mode, you can still use registers as 32 bits, using their 32-bit name (starting with "e") instead of your 64-bit name (starting with "r"), and the assembly will be basically the same.

http://en.wikipedia.org/wiki/X86#x86_registers

Or if you need really hard reading (e.g. 1000 pages)

http://www.intel.com/products/processor/manuals/index.htm I read several hundred pages of these manuals and learned a lot, really good stuff.

Answer 2

All answers here mention changes to the set of registers, which I will list here for completeness:

• All existing 32-bit general-purpose registers are expanded to 64 bits ( EAX applies to RAX , etc.)
• 8 new 64-bit general purpose registers ( R8 through R15 )
• 8 new 128-bit SSE registers ( XMM8 via XMM15 )

There are also changes in addressing modes:

• CS, DS, ES and SS are flat. That is, their base is 0x0 , and their limit is 0xffffffffffffffff . FS and GS can have a base of more than 32 bits.
• The descriptors in GDT, LDT, and IDT have changed. They have 8 bytes in 64-bit mode.
• Continuous address space. In 32-bit mode, the linear address space is from 0x0 to 0xfffffff . In 64-bit mode, the linear address space is divided from 0x0 to 0x00007ffffffff and from 0xffff800000000000 to 0xffffffffffffffff . Basically, there is only 48 bits of the address, and the address is decrypted into 64 bits.
• New swap mode.

Various instructions have been removed:

• One byte of INC instructions encoded with 40+ rw and 40+ rd . Byte 4 x became the REX prefix.
• to load segment registers that are now flat: LDS , LDS , LSS .

There are more differences that I just remember from my head. I will add them if I can come up with something else.

Answer 3

I believe that the Wikipedia article you contacted provides a reasonable amount of background information. If you are interested in the specific details of the differences in the long mode, you can refer to one of the official links: Intel® 64 and IA-32 Software Developer's Guide .

Answer 4

Um, stack? Do you mean physical (E / RSP stack)? If so, then my answer is appropriate:

In x86, almost every C compiler uses the cdecl call standard. I do not remember the details of this, but it was consistent among compilers and operating systems. Basically, the arguments are pushed onto the stack (from right to left), and then the return value is pushed to eax, and the caller is responsible for clearing.

On x86-64, though, all of this is pretty squinted. The Windows calling convention is different from linux (most non-linux-unix-like operating systems have survived with the original C calling standard, although this leads to more envy). I don’t remember how they differ, but they do it. See the “different x86-64 calling conventions” on google and you will find details about this.

see: http://en.wikipedia.org/wiki/X86_calling_conventions#Microsoft_x64_calling_convention

Answer 5

For starters, the size of the pointer is 8 bytes instead of 4.

Registers can also contain 64-bit values.

Also at the OS level there are often many differences. For example, on Windows, you have things like file system redirection and registry redirection (WOW64) when running 32-bit applications on 64-bit Windows.

Answer 6

One thing that people have not mentioned is addressing, in 32-bit protected mode, segment registers make sense, and SS DS and CS can be different from each other. In 64-bit protected mode, which cannot happen. The only registers that can be offset (but without limitation) are FS and GS. This means that in 32-bit mode, ds: [ebx] and cs: [ebx] can have a different value, which allows some muck. But usually the OS does not do this.

Another thing that people have not mentioned here is that if you change the 32-bit register in 64 bit mode, it will clear the upper half, but only if you change 32 bits. for example mov eax, 0 will cause rax to be 0, while mov ax, 0 will not touch the upper half. So it's a little complicated looking at the assembly.

As for the stack, this is more of an OS issue than a processor. ABI windows for x64 are different from those used by everyone else (linux, mac ...). You probably need to take a deeper look at the "calling conventions" and ABI (application binary interface). However, on x64 RSP there should be 16 bytes aligned at the function input, so you will often see dummy rsp decrees. This is to ensure that 16 byte values ​​on the stack are always aligned. But at the CPU level anyway, RSP decrements, pressing is still "sp- = word_size; ram [sp] = value". Oh, and on x64 RSP has no limit, on x32 you can tell the CPU that the stack pointer cannot go below a certain address, so accessing the stack with lower addresses will lead to an error.

I'm not sure what exactly you are asking. Perhaps a more specific question will allow a more specific answer.

Answer 7

All registers in the x86 processor are 32-bit, where 64-bit is 64-bit :)

If you use an artichematic pointer, then sizeof () will get different results, as well as the incrment operation.

I feel that you can get detailed information about the Intel site about two architects, as well as even a set of instructions in which new instructions are added with 64-bit processors.

Answer 8

In addition to the fact that general purpose registers are now 64-bit instead of 32, there are also new registers: r8, r9, r10, r11, r12, r13, r14 and r15. The fact that there are more registers also means that most compilers use case-calling conventions for function calls (except those that have varargs), while in x86 most compilers push all arguments to the stack.

X87 FPU is also deprecated, preferring SSE.

Answer 9

Although I do not think this is a specific answer from x86 against x64, it may be relevant.

On Linux for x86, the stack is 4k or 8k, and for x64 it is 16k.