speak at a very low level, how are the kernels initialized?
You can check all the gory details in the Intel spec . Gory details are given in chapter 8.1.
Here is an excerpt:
After powering up or approving the RESET # pin, each processor on the system bus performs hardware initialization of the processor (known as hardware reset) and optional built-in self-test (BIST). [snip] At this point, the action in the processor family is:• Processors of the P6 family - all processors on the system bus (including the processor in a single-processor system) execute multiple processors (MP) APIC bus initialization protocol. A processor that is selected by this protocol as a boot processor (BSP) then immediately starts executing the software initialization code in the current code segment, starting with an offset in the EIP register.
After powering up or approving the RESET # pin, each processor on the system bus performs hardware initialization of the processor (known as hardware reset) and optional built-in self-test (BIST). [snip] At this point, the action in the processor family is:
• Processors of the P6 family - all processors on the system bus (including the processor in a single-processor system) execute multiple processors (MP) APIC bus initialization protocol. A processor that is selected by this protocol as a boot processor (BSP) then immediately starts executing the software initialization code in the current code segment, starting with an offset in the EIP register.
There are several ways to download multicore soc depending on the architecture, system - AMP or SMP, etc. One simple way for a dual-core SMP system is that CPU0 starts with the reset vector (for example, 0x00000000, which indicates the flash memory where the load monitoring program is stored). During this time, other kernels are in WFI (waiting for an interrupt) or boot state. CPU0 loads and sets the ground for loading CPU1.
for more details http://www.linux-arm.org/LinuxBootLoader/SMPBoot
freescale.com/files/32bit/doc/app_note/AN3542.pdf