I have the following make file:
CCC = g ++
CCFLAGS = -ansi
driver: driver.o graph.o
$ (CCC) -o driver driver.o graph.o
graph.o: graph.h
driver.o: graph.h
adjl:
rm -f graph.h graph.cc
ln -s adjl / graph.cc.
ln -s adjl / graph.h.
touch graph.cc graph.h
adjm:
rm -f graph.h graph.cc
ln -s adjm / graph.cc.
ln -s adjm / graph.h.
touch graph.cc graph.h
clean:
rm -f * .o
real_clean: clean
rm -f graph.cc graph.h
rm -f driver The idea is that I'm trying to link two different .cc / .h files depending on which implementation I want to use. If I do real_clean, none of the .cc / .h files exist, I just have a driver.cc file and a makefile in the folder. If I call, he says they are relevant. This happens even if I edit the files in adjl / adjm to make them newer.
[95]% ls
adjl / adjm / driver.cc makefile
[96]% make adjl
make: `adjl 'is up to date.
[97]% make adjm
make: `adjm 'is up to date.
I took the makefile template from another project that I did, and they are written the same way, but I can repeatedly do the same commands without the "actual" problems.
I have googled, but I did not find a problem similar to mine (usually they seem to attract users who do not clean up before they are created).
Thanks for reading.
Dwayne
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