The size of char, short, int, long, etc. differs depending on the platform. 32-bit architectures have char = 8, short = 16, int = 32, long = 32. 64-bit architectures have char = 8, short = 16, int = 32, long = 64.
Many DSPs do not have 2 types of power. For example, Motorola DSP56k (a bit outdated) has 24-bit words. The compiler for this architecture (from Tasking) has char = 8, short = 16, int = 24, long = 48. To make things confusing, they made alignment char = 24, short = 24, int = 24, long = 48. This due to the fact that it does not have byte addressing: the minimum available block is 24 bits. This has the exciting (annoying) property of involving a lot of divide / modulo 3 when you really need to access an 8-bit byte in an array of packed data.
You will find only non-power-of-2 in special-purpose cores, the size of which corresponds to a special pattern of use, with the advantage of performance and / or power. In the case of 56k, this was due to the fact that there was a block with incremental addition that could load two 24-bit quantities and add them to the 48-bit result in one cycle on three buses simultaneously. The entire platform was designed around him.
The main reason most general-purpose architectures use authority-2 is because they are standardized on an octet (8-bit bytes) as the minimum size type (except for flags). There is no reason why it could not be 9 bits, and, as indicated elsewhere, 24 and 36 bits were common. This would permeate the rest of the design: if x86 were a 9-bit byte, we would have 36 octet cache lines, 4,608 octet pages and 569 KB would be enough for everyone :) We probably would not have "nibbles", though, since you cannot split 9 bits in half.
This is currently almost impossible to do. All this is very good with such a system as from the very beginning, but interacting with data created by systems with 8 bit bytes would be a nightmare. It is already quite difficult to parse 8-bit data in a 24-bit DSP.
John ripley
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