Intel MSR frequency scaling per stream

Question

I am expanding the Linux kernel to control the frequency of some threads: when they are scheduled for the kernel (any kernel!), The kernel frequency is changed by writing the correct p-state to the IA32_PERF_CTL register, as suggested in the Intel manual. But when different threads with different “tunable” frequencies are planned, it seems that the throughput of the entire stream increases, as if all the cores were operating at the maximum set frequency.

I have done many tests and measurements under different loading and configuration conditions, but the result is the same. After some tests with CPUFreq (without starting the application, I set different frequencies on each core, and finally, the measured frequencies with cpufreq-info -w were equal), I wonder if the processor cores can really start with different, independent frequencies , or if there are hardware policies or restrictions.

Finally, is there a CPU model that makes it possible to scale this fine-grained frequency?

The processor I use is the Intel Core i5 750

Answer 1

You cannot control individual core frequencies for active kernels. However, you can control the frequencies of all active cores the same. The reasons for the previous answers are that all cores are on the same active voltage plane. I would like to hope that the next generation Haswell processors will allow each core to be controlled separately.

Answer 2

I think you are missing a large part of the picture!

Read about power and watch domains. All processor cores in the domain operate in the same P-state (i.e., with the same frequency and voltage). The P-state in which all cores will work in this domain will always be the P-state of the kernel requesting the highest P-state in this domain. MSRs do not reflect this at all, nor the interfaces that the kernel provides.

Anandtech has a good article: http://www.anandtech.com/show/2658/2

"All this is very similar to AMD Phenom, but where they differ from each other in how they deal with power management. While AMD allows individual cores to request different clock frequencies, Nehalem tries to start all its cores at the same frequency if one core Is inactive, then it is simply controlled by power supply, and the kernel is effectively turned off. "

I did not connect the power meter to SB / IB, but I assume that the behavior is the same.

Answer 3

cpufreq-info displays information about which kernels should be synchronous in their P-states:

 [ root@navi ~]# cpufreq-info cpufrequtils 008: cpufreq-info (C) Dominik Brodowski 2004-2009 Report errors and bugs to [e-mail] , please. analyzing CPU 0: driver: acpi-cpufreq CPUs which run at the same hardware frequency: 0 1 <---- THIS CPUs which need to have their frequency coordinated by software: 0 <--- and THIS maximum transition latency: 10.0 us. 

At least because of this, I would recommend going through the cpufreq interfaces instead of directly configuring the registers, and also allowing running on non-Intel processors that may have unusual requirements.

Also check how to make kernel threads tied to a specific kernel to avoid unexpected switching if you haven't already.

Answer 4

I want to thank everyone for their contribution! Further investigation I found other details that I share with the community.

As suggested, Nehalem places all the cores in one clock area, so that the maximum frequency set among all cores applies to all of them; some tools may show different frequencies on idle cores, but just run any application to increase the frequency to the maximum. This, in my tests, also applies to Sandy Bridge, where LLC cores and trays are all in the same frequency / voltage range. I guess this behavior also happens with Ivy Bridge, as it is just a “tick”. Instead, I believe that Haswell places the kernels and LLC nodes in different singular domains, thereby ensuring the frequency of each core. It is also advertised on multiple pages, for example http://www.anandtech.com/show/8423/intel-xeon-e5-version-3-up-to-18-haswell-ep-cores-/4