ARM Code (GCC 4.6.3 s -O3 ):
clamp1: mvn r3, #126 cmp r0, r3 movlt r0, r3 cmp r0, #127 movge r0, #127 bx lr clamp2: add r0, r0, #127 mvn r3, r0 and r0, r0, r3, asr #31 sub r0, r0, #254 and r0, r0, r0, asr #31 add r0, r0, #127 bx lr
Thumb code:
clamp1: mvn r3, #126 cmp r0, r3 it lt movlt r0, r3 cmp r0, #127 it ge movge r0, #127 bx lr clamp2: adds r0, r0, #127 mvns r3, r0 and r0, r0, r3, asr #31 subs r0, r0, #254 and r0, r0, r0, asr #31 adds r0, r0, #127 bx lr
Both are windless thanks to the ARM conditional design. I bet they are essentially comparable in performance.
nneonneo
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