Implementation of transition register management in uniprocessor MIPS

Question

I am trying to implement jr (jump register) command support for a single-cycle MIPS processor. In the following figure, I drew a simple multiplexer that allows you to choose between a regular chain PC or an instruction address (jr).

How can I find out what the JR instruction to select a multiplexer in is "1"? I already did jump and jump_and_link (although the image doesn’t display it, because I don’t have my project in my hands now), and to control them, I just check if the code is OP 10 (jump) or 11 (jal) in the main control and then set mux sel to '1'. But I think that I cannot do the same with jr, as the layout of the instruction is different.

Answer 1

The JR command operation code has Instruction[31:26] == 0 (special) and Instruction[5:0] == 0x08 (JR). . You need to look at both of these bit positions to decide if it is a JR instruction. The Control block in the diagram must have an additional Instruction[5:0]. input Instruction[5:0]. In the rs field in Instruction[25:21] , the source register for this command is selected. The PC must be assigned rs when the JR command is executed.

Answer 2

I think you can improve hardware performance by introducing JR multiplayer before Jump multiplexing, since JR multiplayer is not dependent on pcnext for Sel mux output.