Context
Read the cache optimization docs (linking to the cache line in loops).
The question is related to this context: an array of as many as 1024.
Sizes: cpu cache 64k, cache line 32 bytes, integer size: 4 bytes.
intel core 2 duo
Question
According to my processor, 8 integers fit into the cache line.
[0,1,2,3,4,5,6,7,8,9,10,...,1023] ^ If I want to access 4 and go downward, 3,2,1 and 0 will be loaded already. 5,6,7 are loaded uselessly. [0,1,2,3,4,5,6,7,8,..,1023] ^ If I want to access 7 and go downward, all the next elements will be in cache already. if I want to go upward, according to my cpu I will have to load another cache line immediatly after the arr[7] read.
Am I right?
Further
But what tells me that arr [4] does not have an address that will lead to loading the cache line instead of arr [7]? If my statement is true, we must not only consider alignment in the array, but all alignment of the program memory to minimize cache waste, right?
optimization arrays caching memory computer-architecture
Larry
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