The relationship between the LUT, the logic cell, the logic elements, the system gate

Question

My question is related to the difference and correlation between this terminology:

• Tmp
• Logical cell
• Logic Elements (LE)
• System gate

I know that a lot depends on the FPGA manufacturer, but, for example, the FPGA vendor, who claims to be one of its products: FPGA with the equivalent of 100,000 System Gates. up to 1.5k LE.

How can I associate this statement with an equivalent FPGA provider using LUTs and logical cells?

I ask this question because I want to transfer some project from FPGA, which tells me the system gate number and LE for FPGA, which tell me that this is the LUT number.

Answer 1

LUT, Logic Cell, and Logic Element are all the same to me: the main underlying logical primitive of FPGA. Xilinx uses LUT, Altera LE, microsemi / lattice, maybe something else.

The problem is that they do not match. In its latest architecture, Xilinx uses 6-input LUTs and alter-4-input LUTs. They are combined into logical blocks that have other functions, such as high-speed chain, registers, and distributed memory.

Converting to a system gate is useful, but remember that this is also a marketing war. Xilinx FPGA should be 1.5 times the Altera FPGA logic, since the LUT has 6 instead of 4, right? Well, it depends a lot on the design, if the design cannot use the 6 inputs a lot, unused ones are lost. The same thing with fast-wrap logic, I don't know if they count it in the equivalent number of gates, but keep in mind that the number is swelling.

System gates are a common measure of ASIC design complexity. The same design at two different foundries should have the same system door numbers, since waste is not an ASIC problem.

If you are looking for FPGA. I suggest you choose your supplier, your design portfolio is enough to get an idea of ​​how big FPGA you need and choose FPGA from the upgrade path (if you want to enter the market). If this is for one prototype, just use the largest FPGA you can afford.