What does “everything” mean in a makefile?

Question

I read several manuals regarding Make files, but it’s still not clear to me what the purpose of “everything” is and what it does.

Any ideas?

Answer 1

Building, as the Makefile understands, consists of many goals. For example, to create a project you may need

• Build file1.o from file1.c
• Build file2.o from file2.c
• Build file3.o from file3.c
• Compile executable file1 from file1.o and file3.o
• Build executable2 from file2.o

If you performed this workflow using the makefile, you can do each of the goals separately. For example, if you wrote

make file1.o 

if necessary, he will create only this file.

The name all not fixed. This is just a conditional name; all target means that if you call it, make will create all , which is necessary to create a complete assembly. This is usually a fictitious target that does not create any files, but simply depends on other files. In the above example, the construction of everything necessary is the creation of executable files, other files are drawn in as dependencies. Therefore, in the makefile, it looks like this:

 all: executable1 executable2 

all target is usually the first one in the makefile, because if you simply write make on the command line without specifying a target, it will build the first target. And you expect this to be all .

all usually also a .PHONY object. More details here .

Answer 2

The GNU Make Guide provides a clear definition for all in its list of standard goals .

If the author of the Makefile complies with this convention, the target all should:

• Compile the entire program, but do not create documentation.
• Specify a default target. Since at startup, just make should do the same as make all .

Achieving 1 all usually defined as a .PHONY target, which depends on the executable file (s) that form the entire program:

 .PHONY : all all : executable 

To achieve 2 all must be either the first target defined in the make file, or assigned as the default target:

 .DEFAULT_GOAL := all 

Answer 3

Not sure if this means anything special. This is just an agreement that you supply the “all” rule, and it is usually used to list all the subgoals needed to build the entire project, hence the name “all”. The only thing that is especially important in this is that people often put it as the first goal in the makefile, which means that just by typing “make” you will do the same thing as “make all”.

Answer 4

The "all" target is an example of a fictitious target - there is nothing called "all" on the disk. This means that when you do "do everything", always think that he needs to build it, and therefore performs all the commands for this purpose. These commands are usually the ones that create all the final products the makefile knows about, but they can do something.

Other examples of fictitious goals are “clean” and “set,” and they work the same way.

If you haven't read it yet, you should read the GNU Make Manual , which is also a great tutorial.