Since byte ordering is an arbitrary design decision. As soon as there is no byte order 1 in the register.
Byte order occurs when we address smaller units, such as bytes. This is almost an arbitrary decision that the CPU developer receives: big-endian or little-endian.
It is useful to simplify the situation and understand that this is mainly communication with peripheral devices that are ordered by bytes. Yes, it can be detected through byte addressing, as you proved, but in general, scalar values ββare loaded and stored as units in registers, in which case the byte order does not change anything. The most significant bits are on the "left", at least as we usually write numbers. And therefore, the << and >> operators always produce exactly the same results in large and low order machines when they are used in accordance with language standards.
But in order to read and write data streams to peripheral devices, you are forced to choose the byte order. This is because peripheral devices are basically byte stream devices. Does the lowest address have the most significant bits or the least? This was done in both directions, and the camps were fairly evenly divided.
Since the memory itself is addressed bytes, you can certainly get other behavior without peripherals, but this usually does not happen without deliberate peeping inside, like you.
Imagine a CPU that has no bytes, only 32-bit words addressed as 0, 1, 2. The C compiler does char, int and all 32-bit objects long. (This is permitted by Cx9.) Wow, byte ordering problems! And this! But .. what happens when we connect our first peripheral device?
1. Well, x86 has registers with an alias of smaller registers, but this is another story.
Digitaloss
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