Variables defined * and * undefined

Question

I think it makes sense somehow, but I can’t understand why: In the following code I get warnings and (note that the source code was indented with tabs):

define variable-definition ifndef $1 $(warning $1 is undefined) else $(warning $1 is defined) endif endef 

PS: I want to check if a variable exists with the name passed as $1 , and not $1 passed.

PPS: Decentralizing the whole thing does not help.

Answer 1

The beta analysis of the root cause is correct, you do not avoid your $ calls $(warning) . Here's how I fix it:

 define variable-def ifndef $1 $$(warning $1 is undefined) else $$(warning $1 is defined) endif endef FOO=bar $(eval $(call variable-def,FOO)) 

Please note that I am inserting spaces, not tabs. If you backtracked with tabs, you get this error: *** commands commence before first target. Stop. *** commands commence before first target. Stop.

This uses GNUisms, but also your sample (I think).

Answer 2

The reason it gives you both warnings is that when you call this function (i.e. extend this variable), Make expands the variables inside it, including both warnings. This happens earlier if it tries to evaluate ifndef (and probably fails). Make just doesn't handle the conventions the way you want.

Here's a way to do this, slightly awkwardly, but efficiently. (To do this really smoothly, as the function is likely to require a significant amount of black magic). Write a separate variable-definition swap file:

 # In makefile variable-definition ifndef $(FOO) $(warning $(FOO) is undefined) else $(warning $(FOO) is defined) endif 

Then in the main make file:

 # In the main makefile bar = something FOO := bar include variable-definition FOO := baz include variable-definition