Is $ 0 on MIPS really hardware zero?

Question

I kind of firmly understand the x86-64 assembly (but not an expert), but many aspects are similar to one platform assembler, so I'm also trying to answer questions that are actually not in my range of knowledge, and I came across several questions About the MIPS assembly.

This aroused my interest in detail, so I checked several online resources for more information. mips.com has a lot to read, but just for my quick info:

Does $zero register a regular zero or hardware zero?

Some sources claim that it is usually zero, while others say that it is always zero. Or does the latter simply assume that it is zero, because it is conditional?

Thank you in advance for clarification (and / or pointers to a specific document from the MIPS website, so I don’t need to bypass information that I really don’t need).

Answer 1

The final answer can be found in MIPS32® Architecture for Programmers Volume I: Introduction to MIPS32® Architecture (pdf), available at mips.com (registration required). According to section 2.4.8.1 in this document:

Two of the general purpose registers of the CPU have assigned functions:

• r0 is rigidly tied to a value of zero and can be used as a target register for any instruction whose result should be discarded. r0 can also be used as a source when a zero value is required.

• r31 is the destination register used by JAL, BLTZAL, BLTZALL, BGEZAL and BGEZALL without being explicitly specified in the instruction word. Otherwise, r31 is used as a regular register.

The remaining registers are available for general use.

Answer 2

The top 5 links say it's a bug (zero).

And, surprisingly, MIPS is not alone in having such an odd register.

For comparison, the TI MSP430 has two special registers: R2 (status register) and R3 (permanent generator). When you read the memory operand through them (or read R3 directly), you get one of the following predefined constants: -1, 0, 1, 2, 4, 8. The constant depends on the register number and the type of access (direct, indexed, indirect , indirect + auto-increment). This reduces the code execution time and the AFAIR execution time, because otherwise direct constants occupy 16 bits and must be extracted.