Make: do nothing for `all '

Question

I look, for example, pgm to create a make file.

http://mrbook.org/tutorials/make/

My eg_make_creation folder contains the following files,

desktop:~/eg_make_creation$ ls factorial.c functions.h hello hello.c main.c Makefile 

Makefile

 # I am a comment, and I want to say that the variable CC will be # the compiler to use. CC=gcc # Hwy!, I am comment no.2. I want to say that CFLAGS will be the #options I'll pass to the compiler CFLAGS=-c -Wall all:hello hello:main.o factorial.o hello.o $(CC) main.o factorial.o hello.o -o hello main.o:main.c $(CC) $(CFLAGS) main.c factorial.o:factorial.c $(CC) $(CFLAGS) factorial.c hello.o:hello.c $(CC) $(CFLAGS) hello.c clean: rm -rf *o hello 

Mistake:

 desktop:~/eg_make_creation$ make all make: Nothing to be done for `all'. 

Please help me understand how to compile this program.

Answer 1

Sometimes the error "Do nothing for everyone" can be caused by spaces before the command in the makefile rule instead of tab. Please make sure you use tabs instead of spaces inside your rules.

 all: <\t>$(CC) $(CFLAGS) ... 

instead

 all: $(CC) $(CFLAGS) ... 

Please refer to the GNU make manual for a description of the rule syntax: https://www.gnu.org/software/make/manual/make.html#Rule-Syntax

Answer 2

Delete the hello file from the folder and try again.

The purpose of all depends on the purpose of hello . The hello target first tries to find the corresponding file in the file system. If he finds this and updates with dependent files, there is nothing to do.

Answer 3

When you just give make, it makes the first rule in your make file, i.e. "all" . You indicated that “everything” depends on “hello,” which depends on main.o, factorial.o, and hello.o. So, "make" is trying to see if these files are present.

If they are present, "make" sees if their dependencies depend, for example. main.o has a dependency main.c, changed. If they have changed, rebuild them, otherwise skip the rule. Likewise, it recursively goes about creating files that have been modified and finally runs the largest command, “everything” in your case, to provide you with the “hi” executable in your case.

If they are absent, blindly builds everything under the rule.

Coming to your problem, this is not an error, but "make" says that every dependency in your makefile is updated and nothing needs to be done!

Answer 4

Make behaves correctly. hello already exists and is not older than .c files, and therefore no longer need to do the work. There are four scenarios in which make will need to (re) be built:

• If you change one of your .c files, it will be newer than hello , and then it will be restored when make starts.
• If you delete hello , you will obviously have to rebuild it
• You can make make rebuild everything with the -B option. make -B all
• make clean all will remove hello and will require rebuilding. (I suggest you look at @Mat's comment on rm -f *.o hello

Answer 5

This is not an error when the make command in unix works based on timestamps, i.e. lets say you made certain changes to factorial.cpp and compile using make..then make shows that only the ** cc -o factorial.cpp ** command is executed. Otherwise, if you run the same command as without making any changes to any file with the .cpp extension, the compiler says that the output file is updated ... the compiler gives this information until we make certain changes to the file file .cpp. The advantage of the make file is that it reduces the time it takes to recompile by compiling only the files that have been modified and directly using the (.o) files of unmodified files ......

Answer 6

I think you missed the tab on the 9th line. Line after all: hello should be an empty tab. Make sure you have a blank tab in the 9th row. This will make the interpreter understand that you want to use the default recipe for the makefile.

Answer 7

I came to this peculiar, difficult to debug error on a different route. My problem ended up using a template rule at the build stage, when the target and the dependency were located in different directories. Something like that:

 foo/apple.o: bar/apple.c $(FOODEPS) %.o: %.c $(CC) $< -o $@ 

I had several dependencies configured this way, and I tried to use one template recipe for them all. It is clear that the only substitution "%" will not work here. I set clear rules for each addiction and again ended up among puppies and unicorns!

 foo/apple.o: bar/apple.c $(FOODEPS) $(CC) $< -o $@ 

Hope this helps someone!