Today I realized that with my professor in the Parallel Programming class they understand what “false separation” is. What my professor said does not make sense, so I immediately pointed it out. She thought that “false separation” would lead to a program error.
I said that “false separation” occurs when another memory address is assigned to the same cache line, writing data to one of them will cause the other to exit the cache. If processors write between two false shared addresses, rotate them and rotate, both of them will not be able to remain in the cache, so all operations will result in DRAM access.
This is my opinion so far. In fact, I'm not quite sure what I said ... If I have a misunderstanding, just indicate this, please.
So there are a few questions. The cache is supposed to be consistent with 64 bytes, 4-band associative-associative.
- Is it possible that two addresses separated by more than 64 bytes are "false sharing"?
- Is it possible that a single-threaded program is faced with the problem of "false exchange"?
- What is the best code example for playing a “fake exchange”?
- In general, what should be noted in order to avoid a “false exchange” for programmers?
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