Disabling IWDG STM32 during debugging

Question

I have a ChibiOS 3.x program on the STM32F4 microcontroller, where I use the IWDG watchdog timer to reset the MCU with these errors:

int main() { iwdgInit(); iwdgStart(&IWDGD, &wd_cfg); while(true) { // ... do stuff } } 

If I now attach my debugger and stop the program at any time (manually or through a breakpoint), the microcontroller will reset after a timeout determined by the configuration of the watchdog timer (and therefore causes problems in my debugging process)

How to disable this behavior, that is, how to disable IWDG when the kernel is stopped due to a debugger?

I tried disabling it completely, however I need to leave it running in order to catch unwanted IWDG dumps.

Answer 1

STM32 MCUs contain a feature called debug freeze. You can stop several peripheral devices, including I2C, RTC timeouts and, of course, a watchdog timer.

For STM32 Reference Manual, see 38.16.4ff.

IWDG runs on the APB1 bus. Therefore, you need to change DBGMCU_APB1_FZ , most specifically approve the DBG_IWDG_STOP bit in this register.

The POR value (= default value) for this register is 0x0, i.e. if you don't disable it actively, IWDG will still work.

 int main() { // Disable IWDG if core is halted DBGMCU->APB1FZ |= DBGMCU_APB1_FZ_DBG_IWDG_STOP; // Now we can enable the IWDG iwdgInit(); iwdgStart(&IWDGD, &wd_cfg); // [...] } 

Please note that when you do not enable the watchdog timer in the software, it can still be enabled at the hardware level if the WDG_SW bit is reset in the flash option bytes.

If you use ST HAL (not included in ChibiOS, see STM32CubeF4 ), you can also use this macro:

  __HAL_DBGMCU_FREEZE_IWDG() 

(which basically does the same as we above)

In addition, you need to enable the DBGMCU clock on APB2.

  __HAL_RCC_DBGMCU_CLK_ENABLE(); 

Answer 2

When using ST HAL, the correct macro to use is:

 __HAL_DBGMCU_FREEZE_IWDG()